SublimeLinter-contrib-modelsim
⚡👌 ModelSim vcom/vlog plugin for SublimeLinter. Linting for VHDL and Verilog/SystemVerilog.
Details
Installs
- Total 4K
- Win 4K
- Mac 159
- Linux 318
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| Linux | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
Readme
- Source
- raw.githubusercontent.com
SublimeLinter-contrib-modelsim
This linter plugin for SublimeLinter provides an interface to vcom/vlog - VHDL/Verilog/SystemVerilog compilers provided with ModelSim and QuestaSim which provide a linting mode. vcom will be used with “VHDL” files , vlog with “Verilog” and “SystemVerilog” files.
Installation
SublimeLinter must be installed in order to use this plugin.
Please use Package Control to install the linter plugin.
Before installing this plugin, you must ensure that vcom/vlog are installed on your system.
In order for vcom/vlog to be executed by SublimeLinter, you must ensure that its path is available to SublimeLinter. The docs cover troubleshooting PATH configuration.
Settings
- SublimeLinter settings: http://sublimelinter.readthedocs.org/en/latest/settings.html
- Linter settings: http://sublimelinter.readthedocs.org/en/latest/linter_settings.html
Passing arguments to vcom/vlog
Arguments can be passed in a linter settings file or set in a project settings file:
- Using linter settings file: “javascript // SublimeLinter Settings - User { "linters”: { “vcom”: { “args”: [“-2008”, “-lint”, “-check_synthesis”], “working_dir”: “$project_path/../sim” }, “vlog”: { “args”: [“-sv”, “-lint”, “-check_synthesis”], “working_dir”: “$project_path/../sim” } } } “
- Alternately, project specific arguments can be set in a project file: ”javascript “settings”: { // SublimeLinter-contrib-modelsim “SublimeLinter.linters.vcom.args”: [“-2008”, “-lint”, “-check_synthesis”], “SublimeLinter.linters.vcom.working_dir”: “$project_path/../sim”, “SublimeLinter.linters.vlog.args”: [“-sv”, “-lint”, “-check_synthesis”], “SublimeLinter.linters.vlog.working_dir”: “$project_path/../sim” }, “
Demo
vcom for VHDL file:
vlog for Verilog file:
