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Verilog Gadget

by poucotm ALL

🔧 Verilog plugin for Sublime Text 2/3. It helps to generate a simple testbench, instantiate a module, insert a user-header, repeat codes with formatted incremental/decremental numbers, etc.

Labels verilog

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Installs

  • Total 17K
  • Win 13K
  • Mac 1K
  • Linux 3K
Feb 5 Feb 4 Feb 3 Feb 2 Feb 1 Jan 31 Jan 30 Jan 29 Jan 28 Jan 27 Jan 26 Jan 25 Jan 24 Jan 23 Jan 22 Jan 21 Jan 20 Jan 19 Jan 18 Jan 17 Jan 16 Jan 15 Jan 14 Jan 13 Jan 12 Jan 11 Jan 10 Jan 9 Jan 8 Jan 7 Jan 6 Jan 5 Jan 4 Jan 3 Jan 2 Jan 1 Dec 31 Dec 30 Dec 29 Dec 28 Dec 27 Dec 26 Dec 25 Dec 24 Dec 23 Dec 22
Windows 1 0 3 2 2 0 0 2 2 3 1 2 4 2 3 3 4 4 1 4 4 3 4 7 2 3 8 8 1 6 5 3 6 3 5 0 1 3 2 1 3 5 3 3 5 6
Mac 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
Linux 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 0 4 3 0 0 1 0 1 0 1 1 0 0 3 0 0 1 0 0 0 1 0 1 0 0 0

Readme

Source
raw.​githubusercontent.​com

Verilog Gadget for Sublime Text

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Verilog Gadget is a plugin for Sublime Text 2 and 3 designed to enhance Verilog development by providing several convenient features. These commands can be accessed through the command palette (Ctrl+Shift+P) or the context menu within .v, .vh, .sv, and .svh files. File extensions can be customized in the settings. For optimal visual experience, the Guna theme is recommended. Additionally, for linting Verilog code, the SublimeLinter-contrib-verilator plugin can be utilized.

Verilog Gadget: Instantiate Module (ctrl+shift+c)

Automatically parses module ports in the current file and generates an instance text of the module, which is copied to the clipboard for easy pasting.

  • It parses module ports for the currently open file
  • It generates an instance text of the module
  • It copies generated text to clipboard
  • Then, you can paste the text to the desired location
  • Supports Verilog-1995, Verilog-2001 style ports and parameters
  • example)

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Verilog Gadget: Generate Testbench

Creates a simple testbench with an instance and signals of the module, supporting both Verilog-1995 and Verilog-2001 style ports and parameters.

  • It parses module ports for the currently open file
  • It generates a simple testbench with an instance and signals of the module
  • The testbench is created as a systemverilog file
  • Supports Verilog-1995, Verilog-2001 style ports and parameters
  • example)

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Verilog Gadget: Simulaton Template

Generates files for simulation based on customizable templates, with support for tools like ModelSim and VCS.

  • It creates files for simulation based on the template
  • You can make your own template as a compressed file (.zip,.tar,.tgz)
  • You can specify the path of your template ("simulation_template","simulation_directory“)
  • 'example-modelsim' is the template for modelsim, 'example-vcs' is the template for vcs
  • It automatically generates the testbench files for the current view
  • It changes keywords in files of the template ({{TESTBENCH FILE}}, {{TESTBENCH NAME}}, {{MODULE FILE}}, {{MODULE NAME}},{{MODULE PORTLIST}})
  • example)

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Verilog Gadget: Insert Header (ctrl+shift+insert)

Allows insertion of a user-defined header description into files, with placeholders for current date, time, filename, and other details.

  • You can insert your own header-description in a format from the file specified in settings
  • {YEAR} is replaced as the current year
  • {DATE} is replaced as the create date
  • {TIME} is replaced as the create time
  • {RDATE} is replaced as the revised date
  • {RTIME} is replaced as the revised time
  • {FILE} is replaced as the file name
  • {TABS} is replaced as the tab size
  • {SUBLIME_VERSION} is replaced as the current sublime text version
  • example) header example

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Verilog Gadget: Repeat Code with Numbers (ctrl+f12)

Enables repeating selected code with formatted incremental or decremental numbers, supporting Python's format symbols for various number formats.

  • Select codes you want to repeat, this may include Python's format symbol, such as {…}
  • Enter a range in the input panel as the following : [from]~[to],[↓step],[→step] (e.g. 0~10 or 0~10,2 or 10~0,-1 or 0~5,1,1 ...)
  • [↓step] means the row step, default is 1, [→step] means the column step, default is 0
  • The code is repeated in incremental or decremental numbers
  • Python's format symbol supports variable formats : binary, hex, leading zeros, …
  • To use '{' as it is, you must enter twice like '{{'
  • Refer to Python's format symbol here, https://www.python.org/dev/peps/pep-3101/
  • For sublime text 2 (python 2.x), you must put an index behind ':' in curly brackets like foo {0:5b} bar {1:3d}
  • example)

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  • The index can be used to repeat the same number
  • example)

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  • It is possible to repeat numbers with clipboard text (line by line)
  • Use {cb} for clipboard text
  • example)

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  • The simplest way is added using multiple selection.
  • Select multiple strings (or blanks) using shift + l or ctrl + LButton
  • You can also select sparsely.
  • example) [] ← selected position, set a range - start = 1, step = 2
abc <= [];      abc <= 1;
         def <= [];      def <= 3;     
         ghi <= [];     ghi <= 5;   
         jkl <= [];      jkl <= 7;    
         mno <= [];      mno <= 9;

Verilog Gadget: Alignment (ctrl+shift+x)

  • Select a range to apply the alignment to
  • Press the shortcut key
  • Alignment is based on the longest length of the left hand side in the selection
  • Tabs are replaced as spaces except indentation
  • example)

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Verilog Gadget: Insert Snippet (ctrl+alt+p)

  • You can make your own parameterized snippets like this example
  • Add your snippet settings like this
  • Run Insert Snippet command
  • example)

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Verilog Gadget: Convert Digits (HEX → DEC, DEC → HEX) (alt+shift+up, alt+shift+down)

  • Select Digits and Press the key (alt+shift+↑) - 10 → 16
  • Select Digits and Press the key (alt+shift+↓) - 16 → 10

Verilog Gadget: VCD to WaveDrom (ctrl+alt+v)

  • WaveDrom : digital timing diagram editor
  • Open .vcd file (a clock should be included)
  • Run VCD to WaveDrom command

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Verilog Linter (another package)

SublimeLinter-contrib-verilator

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Donate

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If you find Verilog Gadget helpful and would like to support its continued development, consider making a donation. Your contributions are appreciated and assist in the ongoing improvement of the plugin.

Issues

When you have an issue, tell me through https://github.com/poucotm/Verilog-Gadget/issues, or send me an e-mail poucotm@gmail.com